論文誌

1. 小崎信明, 宇野理恵, 天野英晴, “超低消費電力粗粒度再構成アクセラレータCMAのPEアレイアーキテクチャの最適化”, 情報処理学会論文誌：コンピューティングシステム, Vol.5, No.5, pp10–22, Oct 2012.
2. 石井義史, 王蔚涵, 天野英晴, “VLIW型プロセッサにおけるMixed Power Gatingの研究”,  情報処理学会論文誌：コンピューティングシステム, Vol.5, No.5, pp23–32, Oct 2012.
3. Mohamad Sofian Abu Talip, Takayuki Akamine, Yasunori Osana, Naoyuki Fujita, Hideharu Amano, “Partial reconfiguration of flux limiter functions in MUSCL scheme using FPGA”, IEICE Transactions on Information & Systems, E-95D, No.10, pp2369–2376, Oct 2012.

国際学会

1. Amila Akagic, and Hideharu Amano, “”A Study of Adaptive co-processors for Cyclic Redundancy Checks on an FPGA”,” Proc. of the International Conference on Field-Programmable Technology, Dec 2012.
2. Yusuke Koizumi, Eiichi Sasaki, Daisuke Sasaki, Yasuhiro Take, Mitaro Namiki, Tadahiro Kuroda, and Hideharu Amano, “”CMA-CUBE: A SCALABLE RECONFIGURABLE ACCELERATOR WITH 3-D WIRELESS INDUCTIVE COUPLING INTERCONNECT”,” Proc. of the International Conference on Field Programmable Logic and Application, Oct 2012.
3. Toru Katagiri, Kazuei Hironaka, and Hideharu Amano, “”Extension of Memory Controller Equipped with MuCCRA-3-DP: Dynamically Reconfigurable Processor Array”,” Proc. of the WReCS 2012 , Sep 2012.
4.  Shimpei Nomura, Tetusya Nakahama, Junichi Higuchi, Jun Suzuki, Takashi Yoshikawa , and Hideharu Amano, “”The multi-GPU System with ExpEther”,” Proc. of the PDPTA, July 2012.
5. Michihiro Koibuchi, Hiroki Matsutani, Hideharu Amano, D.Frank Hsu, and Henri Casanova, “”A Case for Random Shortcut Topologies for HPC Interconnects”,” Proc. of the ISCA, June 2012.
6. Weihan Wang, Yuya Ohta, Yoshifumi Ishii, Kimiyoshi Usami, and Hideharu Amano, “”Trade-off analysis of Fine-grained Power Gating Methods for Functional Units in a CPU ”,” Proc. of the COOL Chips XV , April 2012.
7. Toru Katagiri, Kazuei Hironaka, and Hideharu Amano, “”Extension of memory controller equipped with MuCCRA-3”,” Proc. of the COOL Chips XV (Poster), April 2012.
8. Yusuke Koizumi, Eiichi Sasaki, Mitaro Namiki, and Hideharu Amano, “”Application Development for a Heterogeneous Multi-Core Processor”,” Proc. of the COOL Chips XV (Poster), April 2012.
9. Rie Uno, Nobuaki Ozaki, and Hideharu Amano, “”Design Exploration of PE Array Networks for Cool Mega Array”,” Proc. of the COOL Chips XV (Poster), April 2012.
10. Mohamad Sofian Abu Talip, Takayuki Akamine, Yasunori Osana, Naoyuki Fujita, and Hideharu Amano, “” Cost effective implementation of flux limiter functions using partial reconfiguration ”,” Proc. of the ARC 2012, Mar 2012.
11. Eiichi Sasaki, Daisuke Sasaki, Ikan Wang, Yusuke Koizumi, and Hideharu Amano, “” Message Passing Direct Memory Access Transfer Method for Inter-Chip Network ”,” Proc. of SASIMI 2012, March 2012.
12. Hao Zhang, Hiroki Matsutani, Yasuhiro Take, Tadahiro Kuroda, and Hideharu Amano, “” Vertical link on/off control methods for wireless 3-D NoCs ”,” Proc. of the ARCS 2012, Feb 2012.
13. Mai Izawa, Nobuaki Ozaki, Yoshihiro Yasuda, Masayuki Kimura, and Hideharu Amano, “” CMA-2 : The second prototype of a low power reconfigurable accelerator ”,” Proc. of the ASP-DAC 2012, Jan 2012.