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8. Unit

Unit represents a functional block of hardware. A unit working with a clock is called a synchronous unit, while a unit operates with a packet arrival is called an asynchronous unit. Most of provided units are synchronous unit.

8.1 unit class  
8.2 asynchronous_unit class  
8.3 synchronous_unit class  
8.4 synchronous_unit_set class  
8.5 processor class  
8.6 memory_control_unit class  
8.7 fetch_and_dec_control_unit class  
8.8 halt_detector class  
8.9 bus_error_detector class  
8.10 timer class  
8.11 tracewriter_unit class  
8.12 comm_io_unit class  
8.13 multi_io_unit class  
8.14 router class  
8.15 deterministic_router class  
8.16 duato_router class  
8.17 network_interface class  
8.18 dummy_network_interface class  
8.19 single_processing_element class  
8.20 generic_processing_element class  


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8.1 unit class

unit class is a base class of all functional units with state transition. All class which represents units are implemented as a derived class of this class. unit class is an abstract class which specifies an interface for reset of the state to its derived class. This class is used only for a base class of asynchronous_unit class and synchronous_unit class.


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8.2 asynchronous_unit class

asynchronous_unit class is a base class of units which operates with an arrival of a packet. All classes which represents asynchronous units is implemented as its derived class. Unlike a synchronous unit, it is activated with packet arrival, and so hardware units without delay can be implemented. asynchronous_unit class is an abstract class which specifies an interface for activation to its derived class.

asynchronous_unit class provides the following pure virtual functions. Concrete derived classes are required to give definition of pure virtual functions. asynchronous_unit class is implemented as a derived class of a root_object class, and so pure virtual functions of root_object should be implemented also. See section 4.1 root_object class.

void activate(port&)
Activates with a packet arrival form specified input port. This function is called from class object automatically, and so unnecessary calling is prohibited.

void reset(void)
Resets the state of the object.


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8.3 synchronous_unit class

synchronous_unit class is a base class of units providing state transition synchronized with a clock. synchronous_unit class is an abstract class, and specifies an interface for state transition (clock inputs) and initialization of state transition.

There are two state transition functions, and called alternatively. One is for information input phase, and another is for information output phase. Input/output of information is done with an object of port class.

synchronous_unit provides the following pure virtual functions. Derived classes are required to specify definition of all pure virtual functions. Since synchronous_unit is implemented as a derived class of a root_object class, pure virtual functions of root_object class should be implemented also. See section 4.1 root_object class.

void clock_in(void)
Processes state transition of the object. External inputs are only allowed in this function.

void clock_out(void)
Processes state transition of the object. External outputs are only allowed in this function.

void reset(void)
Resets the state of the object.


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8.4 synchronous_unit_set class

synchronous_unit_set class is a unit for treating a set of synchronous units as a single synchronous unit. It is used to implement such as a processing unit. It provides a list of pointers in the synchronous units, and distributes clock and reset signals to units in the list.

The following four protected member functions are provided for derived classes. Derived class arranges function of a synchronous unit using the following functions.

void insert_synchronous_unit(synchronous_unit&)
Appends the specified synchronous unit.

void erase_synchronous_unit(synchronous_unit&)
Removes the specified synchronous unit.

void insert_synchronous_unit_set(synchronous_unit_set&)
Appends the specified synchronous unit set.

void erase_synchronous_unit_set(synchronous_unit_set&)
Removes the specified synchronous unit set.


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8.5 processor class

processor class is an abstract class for representing processors. It is a base class of all processors. Since it is a derived class of single_port_synchronous_unit class, users must define pure virtual functions in single_port_synchronous_unit and the followings.

virtual data_type register_file(size_t) const
Refers the specified register.

virtual address_type program_counter(void) const
Refers the program counter.

virtual bool is_halt(void) const
Returns true if the processor is halted.

virtual bool is_stall(void) const
Returns true if the processor is stalled.

virtual bool is_reading(void) const
Returns true if the processor is in read access state.

virtual bool is_writing(void) const
Returns true if the processor is in write access state.

virtual bool is_user_mode(void) const
Returns true if the processor is in user mode.

virtual bool is_kernel_mode(void) const
Returns true if the processor is in kernel mode.

virtual void halt(void)
Sets the processor to halt.

virtual size_t frequency_magnification(void) const
Returns the magnification of the processor frequency to a bus.

virtual void set_frequency_magnification(size_t)
Sets the magnification of the processor frequency to a bus.


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8.6 memory_control_unit class

memory_control_unit class represents a memory controller. By connecting with mapped_memory class, the first level storage is formed. A single word, burst and split transaction transfer are supported. Read access time and write access time are individually set.

unsigned int read_wait(void) const
Returns the read access time.

unsigned int write_wait(void) const
Returns the write access time.

void set_read_wait(unsigned int)
Sets the read access time.

void set_write_wait(unsigned int)
Sets the write access time.

bool is_connected_to_memory(void) const
Returns true if a memory is connected.

void connect_memory(memory_type&)
Connects the specified memory.

void disconnect_memory(void)
Disconnects a memory.

void enable_split_transaction(void)
Enables split transaction.

void disable_split_transaction(void)
Disables split transaction.

Furthermore, to support memory controllers with individual operations like Fetch-and-decrement, the following protected functions are virtualized.

data_type read(address_type)
Reads the data addressed by the argument.
void write(address_type, data_type)
Writes the data specified by the second argument to the address specified by the first.


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8.7 fetch_and_dec_control_unit class

fetch_and_dec_control_unit class represents a memory controller. A read request is operated as a Fetch-and-decrement. This class is a derived class of memory_control_unit class, so the usage is the same. See section 8.6 memory_control_unit class.


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8.8 halt_detector class

halt_detector class is a class for detection stop of the system. It is a simple synchronous unit which detects writing requests into the pre-defined address. Defining this detection as a halt operation, system halt signal is easily transferred between the software and the simulator.

void set_address(address_type)
Sets the address to be watched.

address_type address(void) const
Returns the address to be watched.


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8.9 bus_error_detector class

bus_error_detector class detects a bus error. A succeeding memory address request on a bus is treated as a bus error.

void set_timeout(unsigned int)
Sets the number of clocks to be decided as timeout.

bool is_bus_error(void) const
Returns true if a bus error occurred.


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8.10 timer class

timer class represents a timer. The object has an internal counter, which is incremented with a clock input. Using this unit, execution time measurement from simulator softwares is possible.


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8.11 tracewriter_unit class

tracewriter_unit class traces addresses of memory accesses and outputs to an address trace file. It watches packets on a connected bus, and waits for read/write requests in the specified address range. If an access request is detected, the time, the processor number, the access type and the address are output to the connected stream. The values are represented with hexadecimal. Pre specified ID number or bus owner ID number is used as a processor identifier.

int id(void) const
Returns the ID.

bool is_valid_address(address_type) const
Returns true if the specified address is in the address range to be watched.

void set_id(int)
Sets the ID.

void reset_id(void)
Resets the ID.

void set_valid_address(address_type, size_type)
Sets the address range to be watched, from the first argument to the second.

void connect_stream(ostream&)
Sets the stream used to output the trace.

void disconnect_stream(void)
Disconnects the stream.


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8.12 comm_io_unit class

comm_io_unit class manages communication between simulated computers and simulators. Half-duplex character base communication between units are provided. Communication with a simulated computer is done through the hardware registers on mapped_memory class address space. A software on a simulator controls read/write to specified address.

Processing in the simulator is performed with send/receive queues in comm_io_unit. The user can control communication by accessing queues.

Processing in the software is performed with send_to_host and receive_from_host in OSIRIS library, and so the user does not care about real communication protocol.

This class is designed as a part of other units. Access request itself is not processed, and the memory access should be processed other units.

8.12.1 comm_io_unit class definition  
8.12.2 comm_io_unit class register  
8.12.3 Communication protocol of comm_io_unit class  


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8.12.1 comm_io_unit class definition

comm_io_unit(address_type, size_type)
Creates an object. The top address of the hardware register is specified by the first argument, and the size of that is specified by the second.

void set_address(address_type, size_type)
Sets the top address and the size of the hardware register. The top address is specified by the first argument, and the size is specified by the second.

bool is_big_endian(void) const
Returns true if endianness of the hardware register is big-endian.

bool is_little_endian(void) const
Returns true if endianness of the hardware register is little-endian.

void set_big_endian(void)
Set the endianness of the hardware register to big-endian.

void set_little_endian(void)
Set the endianness of the hardware register to little-endian.

bool can_put(void) const
Returns true if it is ready to send a data.

bool can_get(void) const
Returns true if it is ready to receive a data.

void put(char_type)
Sends the specified character.

char_type get(void)
Receives a character.


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8.12.2 comm_io_unit class register

comm_io_unit class manages communication between simulated computers and simulators. The following four hardware registers are used.

Maximum data size (1 word)
The maximum character number in a packet.

Header (1 word)
The message type.

Packet size (1 word)
The message size in bytes.

Data (n words)
The message body.

These registers are allocated when hardware registers are initialized with the setup function. The allocations are as follows.

Maximum data size
+0

Header
+ sizeof(data_type)

Packet size
+ sizeof(data_type) * 2

Data
+ sizeof(data_type) * 3


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8.12.3 Communication protocol of comm_io_unit class

Communication between the simulated computer and the simulator is activated with accessing of the computer to hardware registers. Other than hardware registers, sending/receiving queues provided simulators are used for data communication.

The header which decides the type of the packet is defined with the header file `io_protocol.h'. This file is shared with compilers of simulators and simulated softwares.

The following software processing is performed with send_to_host and receive_from_host functions in OSIRIS library, and user does not care about the user protocol.


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8.13 multi_io_unit class

multi_io_unit class is a unit which supports multiple input/output functions simultaneously. Using the unit, the detection of system stop, associative array database with sysinfo_map, referring the command line parameters and reporting the finish status with argument_map, and measuring the time.

Since processing in software side is done with the communication functions for multi_io_unit in OSIRIS library, users don't need to care on the real communication protocol.

8.13.1 multi_io_unit class definition  
8.13.2 Communication protocol of multi_io_unit class  


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8.13.1 multi_io_unit class definition

void set_address(address_type, size_type)
Sets the top address and the size of the hardware register. The top address is specified by the first argument, and the size is specified by the second.

bool is_halt(void) const
Returns true if a halt signal is received.

bool is_defined_sysinfo(const string&) const
Returns true if the information specified by the argument key in the sysinfo associative array is defined.

bool is_defined_integer_sysinfo(const string&) const
Returns true if the information specified by the argument key in the sysinfo associative array is defined as an integer.

bool is_defined_string_sysinfo(const string&) const
Returns true if the information specified by the argument key in the sysinfo associative array is defined as a string.

data_type get_integer_sysinfo(const string&) const
Returns the integer information specified by the argument key in the sysinfo associative array.

const string& get_string_sysinfo(const string&) const
Returns the string information specified by the argument key in the sysinfo associative array.

void set_sysinfo(const string&, data_type)
Sets the integer variable specified by the second argument to the key specified by the first in the sysinfo associative array.

void set_sysinfo(const string&, const string&)
Sets the string variable specified by the second argument to the key specified by the first in the sysinfo associative array.

void unset_sysinfo(const string&)
Removes the specified key in the sysinfo associative array.

void set_file_table_size(size_t)
Sets the size of the file table.

void set_file_input_stream(size_t, istream&)
Connects the file table entry specified by the first argument to the input stream specified by the second.

void set_file_output_stream(size_t, ostream&)
Connects the file table entry specified by the first argument to the output stream specified by the second.

unsigned long timer_clock_value(void) const
Returns the current time.

int commandline_argc(void) const
Returns the number of the command line argument.

const char* commandline_argv(size_t) const
Refers the specific command line argument.

void set_commandline_argument(const char* const*)
Sets the command line arguments.

void commandline_status(void) const
Returns the returned status.


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8.13.2 Communication protocol of multi_io_unit class

The software on the simulator controls input/output operations by communicating with multi_io_unit class according to the following communication protocol. Constants used in the protocol are defined in `io_protocol.h'.

Also, a sequence of communication protocol is stored in the path based on the virtual characters, and communication protocol for comm_io_unit class should be used as a lower communication protocol. See section 8.12.3 Communication protocol of comm_io_unit class.


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8.14 router class

router class is an abstract class representing routers for interconnection network. All router are implemented as its derived class.

It provides specified number of input and output channels and each of them has a certain number of virtual channels. Crossbar for input physical channels and output physical channels, channel controllers and lock flag tables for each virtual channels are provided. For state inspection, counters which counts the total number of routed packets are also provided.

All routers are used through public interfaces of router class. The functions of derived classes are implemented with defining virtual functions including limited public members.

8.14.1 Public interface of router  
8.14.2 Protected interface of router  
8.14.3 Channel controller of router  
8.14.4 How to create a new router  


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8.14.1 Public interface of router

virtual void setup(void)
Sets the router to be available to use. It must be called after all input/output channels are connected, and internal state available if required.

virtual void reset_counter(void)
Initializes all internal counters.

virtual_channel_input& input_channel(size_t)
Refers the specified input channel.

virtual_channel_output& output_channel(size_t)
Refers the specified output channel.

node_address_type node_address(void) const
Refers the node address.

void set_node_address(node_address_type)
Sets the node address.

size_t input_size(void) const
Returns the number of the input channels.

size_t output_size(void) const
Returns the number of the output channels.

size_t channel_size(size_t) const
Returns the virtual channel number of the input channels.

size_t buffer_size(size_t) const
Returns the buffer size of the input channels.

size_t buffer_length(size_t) const
Returns the current buffer length of the input channels.

void set_channel_size(size_t, size_t)
Sets the virtual channel number of the input channel specified by the first argument to the second.

void set_buffer_size(size_t, size_t)
Sets the buffer size of the input channel specified by the first argument to the second.


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8.14.2 Protected interface of router

channel_controller& internal_controller(size_t, size_t)
Refers the channel controller of the virtual channel specified by the second argument of the physical channel specified by the first.

crossbar& internal_crossbar(void)
Refers the internal crossbar.

bool is_locked_output_virtual_channel(size_t, size_t)
Returns true if the flag for the virtual channel specified by the second argument of the physical channel specified by the first is locked.

void lock_output_virtual_channel(size_t, size_t)
Locks the flag for the virtual channel specified by the second argument of the physical channel specified by the first.

bool unlock_output_virtual_channel(size_t, size_t)
Unlocks the flag for the virtual channel specified by the second argument of the physical channel specified by the first.

void set_input_size(size_t)
Sets the number of the input physical channels.

void set_output_size(size_t)
Sets the number of the output physical channels.

void increment_total_hop_count(void)
Increments the total packets gone through.


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8.14.3 Channel controller of router

A channel controller inside the router is implemented as a class. It provides the following values and states.

The operation of the channel controller is defined with the following three states. Packet transfer is done with circulation of them. The sub-state active/inactive is used in the transfer state.

  1. Wait for new packet arriving at the input channel.

  2. If a new packet is arrived, it is routed considering the internal state and other packets. After the destination is fixed, the size of packet is set into remaining flints number, and destination channel number is set into output channel number table. Then go to the transfer waiting state.

  3. Go to the transfer state when the output is possible. If a flit is transferred in the next operation, the sub-state is set into active, otherwise inactive. After entire packet is transferred, return to waiting state.


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8.14.4 How to create a new router

To define a router class, the following pure virtual functions must be defined.

clock_in
clock_out
Describes the actions at a state transition.

setup
Setups the internal states of the router.

reset
Resets the internal states of the router.

It is cumbersome job to describe all functions with a derived class. For easy implementation, deterministic_router class and duato_router class are defined. See section duato_router class.


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8.15 deterministic_router class

deterministic_router class is a base class of the deterministic router. It is a derived class of router class and clock_in function, clock_out, setup and reset which are not defined in router class are defined. In its derived class, only a virtual function routing is needed to be defined.

void routing(const packet_type&, channel_controller&)
Routes the packet specified by the first argument. The second argument shows the channel controller for the input virtual channel which receives the packet. In this function, the packet is routed according to information in the packet header and the channel controller. Resulting output virtual channel number should be set into the channel controller.

The class performs the following processing synchronized with a clock.

[clock_in] select_output_virtual_channel
Check all input virtual channels, and applies the routing to the channel controller with a new receiving packets, then turns its state into transfer waiting state.

[clock_in] arbitrate_output_virtual_channel
Arbitration for output virtual channels are done with all input virtual channels in the transfer waiting state. The priority is fixed with round robin. After obtaining the ownership of the output virtual channel, the controller changes its state into the transfer state.

[clock_in] arbitrate_output_physical_channel
Arbitration for output physical channels are done with all input virtual channels in the transfer state. The priority is fixed with round robin. After obtaining the ownership of the output physical channels turns into active state while ones which cannot get the ownership turns into inactive. The internal crossbar is set according to the transferring pattern.

[clock_out] transmit_packet
A flit is transferred from the controller in transfer/active state. The controller whose packet has be passed changes into wait state.


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8.16 duato_router class

duato_router class is a base class of a router class with adaptive routing according to Duato's minimum and sufficient conditions. It is a derived class of router class and clock_in function, clock_out, setup and reset which are not defined in router class are defined. In its derived class, a virtual function adaptive_routing and escape_routing must be defined.

void adaptive_routing(const packet_type&, channel_controller&)
Adaptive routing is applied to the packet specified bye the first argument. The second argument indicates the channel controller corresponding to the input virtual channel which the packet has arrived. The output virtual channel number of the adaptive routing is set into the channel controller, and the output virtual channel is locked. If the packet is not routing with adaptive manner, do nothing.

void escape_routing(const packet_type&, channel_controller&)
Escape path routing is applied to the packet specified by the first argument. The second argument indicates the channel controller corresponding to the input virtual channel which the packet has arrived. The output virtual channel number of the escape path routing is set into the channel controller. Unlike adaptive routing the output virtual channel is not needed to be locked.

The class performs the following processing synchronized with a clock.

[clock_in] arbitrate_output_channel_for_adaptive
Check all input virtual channels, and tries to apply the adaptive routing to the channel controller with a new receiving packets. If succeeded, the state of the controller turns into transfer state directly.

[clock_in] select_output_virtual_channel
Check all input virtual channels, and applies the escape-path routing to the channel controller with a new receiving packets, then its state turns into transfer waiting state.

[clock_in] arbitrate_output_virtual_channel
Arbitration for output virtual channels are done with all input virtual channels in the transfer waiting state. The priority is fixed with round robin. After obtaining the ownership of the output virtual channel, the controller changes its state into the transfer state.

[clock_in] arbitrate_output_physical_channel
Arbitration for output physical channels are done with all input virtual channels in the transfer state. The priority is fixed with round robin. After obtaining the ownership of the output physical channels turns into active state while ones which cannot get the ownership turns into inactive. The internal crossbar is set according to the transferring pattern.

[clock_out] transmit_packet
A flit is transferred from the controller in transfer/active state. The controller whose packet has be passed changes into wait state.


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8.17 network_interface class

network_interface class is a synchronous unit which represents a network interface. It is connected with the router. If is not an abstract class. Since the public interface does not provide the sending/receiving packet functions, derived classes are used for a real network interface.

It provides an input channel and an output channel, specified size of sending and receiving queues. Counters are provided for counting sending packets/flits, receiving packets/flits, and delay of receiving packets.

In the current implementation, all clocks of network interface in a simulator should be the same for measuring the delay of receiving packets.

8.17.1 Public interface of network_interface  
8.17.2 Protected interface of network_interface  


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8.17.1 Public interface of network_interface

size_t send_queue_size(void) const
Returns the size of the sending queue.

void set_send_queue_size(size_t)
Sets the size of the sending queue.

size_t receive_queue_size(void) const
Returns the size of the receiving queue.

void set_receive_queue_size(size_t)
Sets the size of the receiving queue.

size_t send_queue_length(void) const
Returns the number of packets in the sending queue.

size_t receive_queue_length(void) const
Returns the number of packets in the receiving queue.

const virtual_channel_input& input_channel(void) const
Refers the input virtual channel.

const virtual_channel_output& output_channel(void) const
Refers the output virtual channel.

node_address_type node_address(void) const
Returns the node address.

void set_node_address(node_address_type)
Sets the node address.

size_t send_packet_count(void) const
Returns the total number of sent packets.

size_t send_flit_count(void) const
Returns the total number of sent flits.

size_t receive_packet_count(void) const
Returns the total number of received packets.

size_t receive_flit_count(void) const
Returns the total number of received flits.

timestamp_type total_latency(void) const
Returns the total delay of received packets.


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8.17.2 Protected interface of network_interface

bool is_ready_to_enqueue(void) const
Returns true if it is ready to put a packet to the sending queue.

bool is_ready_to_dequeue(void) const
Returns true if it is ready to get a packet from the receiving queue.

void enqueue_send_packet(packet_type*)
Puts the specified packet to the sending queue.

packet_type* look_received_packet(void)
Refers the header packet in the receiving queue.

packet_type* look_received_packet(void)
Removes the header packet in the receiving queue.


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8.18 dummy_network_interface class

dummy_network_interface class is used in a probabilistic simulation. It is a derived class of network_interface class. It sends packets with specified size and destination, discards receiving packets at destination.

bool is_ready(void) const
Returns true if it is ready to send a packet.

void send_packet(node_address_type dst, size_t len)
Sends the specified packet.


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8.19 single_processing_element class

single_processing_element class is a synchronous unit which integrates a single processor and a memory map. The parameter passing for the program is also supported.

The followings are all pure virtual function, and must be defined in the derived classes.

virtual const processor_type& processor(void) const
Refers the processor.

virtual const memory_map_type& memory_map(void) const
Refers the memory map.

virtual bool is_halt(void) const
Returns true if it is halted.

virtual bool is_bus_error(void) const
Returns true if a bus error occurred.

virtual address_type bus_error_address(void) const
Returns the address of the bus error.

virtual size_t processor_number(void) const
Returns the number of processors in a simulator.

virtual size_t processor_id(void) const
Returns the processor ID.

virtual void set_processor_number(size_t)
Sets the number of processors in a simulator.

virtual void set_processor_id(size_t)
Sets the processor ID.

virtual void set_file_table_size(size_t)
Sets the size of the file table.

virtual void set_standard_input_stream(istream&)
Sets the standard input stream.

virtual void set_standard_output_stream(ostream&)
Sets the standard output stream.

virtual void set_standard_error_stream(ostream&)
Sets the standard error stream.

virtual void set_commandline_argument(const char* const*)
Sets the command line arguments.

virtual int commandline_status(void) const
Returns the return status of the executed program.

virtual bool is_defined_sysinfo(const string&) const
Returns true if the information specified by the argument key in the sysinfo associative array is defined.

bool is_defined_integer_sysinfo(const string&) const
Returns true if the information specified by the argument key in the sysinfo associative array is defined as an integer.

bool is_defined_string_sysinfo(const string&) const
Returns true if the information specified by the argument key in the sysinfo associative array is defined as a string.

data_type get_integer_sysinfo(const string&) const
Returns the integer information specified by the argument key in the sysinfo associative array.

const string& get_string_sysinfo(const string&) const
Returns the string information specified by the argument key in the sysinfo associative array.

void set_sysinfo(const string&, data_type)
Sets the integer variable specified by the second argument to the key specified by the first in the sysinfo associative array.

void set_sysinfo(const string&, const string&)
Sets the string variable specified by the second argument to the key specified by the first in the sysinfo associative array.

void unset_sysinfo(const string&)
Removes the specified key in the sysinfo associative array.

data_type timer_clock_value(void) const
Returns the value of the internal timer.

virtual bool load(const char*)
Loads the specified program. True is returned if the operation succeeded.

virtual void disassemble(ostream&, address_type, size_type) const
Outputs dis-assemble results with the top address specified by the second argument and the size specified by the third to the stream specified by the first.


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8.20 generic_processing_element class

generic_processing_element class includes a processor, a local memory, a sysinfo associative array, bus error detection mechanism and input/output devices. It is a class of processing element of parallel machines.


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This document was generated by Masaki WAKABAYASHI on September, 3 2003 using texi2html