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10. Bus

Bus implementation and descriptions how to use it are introduced.

10.1 Bus Implementation  
10.2 Using Bus  


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10.1 Bus Implementation

Bus is consisting of packets on a bus and input/output ports for path of packets.

Packet
Information on a bus is represented with bus_packet_base class. This class is an abstract class, and it does not provide any states other than address and data. State query function is supported with pure virtual functions or pre-defined virtual functions. To implement a packet with real states, a derived class with additional state should be provided. By defining pure virtual functions only, a object of a derived class can be instantiated. However, to reduce the calling cost in the execution time, other virtual functions should be re-defined. See section 5.2 bus_packet_base class.

bus_packet class is a concrete derived class of bus_packet_base class, which has concrete functions provided in bus_packet_base class only. traditional bus transaction can be implemented with bus_packet class. See section 5.3 bus_packet class.

Port
It takes a role of an interface for buses. The bus in ISIS is implemented with port class and bus_packet_base class, but it is a cumbersome job to access them directly. It is provided to conceal such complexity. Accessing bus with bus_port_base class functions, its implementation can be independent from port class and bus_packet_base class.

bus_port_base only provides an interface for abstract bus_packet_base class, and functions such as for packet generation are not provided. bus_port_base class is a concrete derived class of bus_port_base class which is an interface of bus_packet, the sending packet function is added.


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10.2 Using Bus

bus_packet_base class supports five basis packet types: request, grant, ack, nack and data. A bus transaction is done with transferring some of them between a sender and a receiver.

Request
It represents some request for write or read. Usually, target address is attached. Associated data can be attached.

Grant
It represents the request is acceptable. The sender which receives the grant packet releases the bus and waits for ack, nack or data.

ack
It represents that the request can be received and the receiver's state is ready to receive. Associated data can be attached.

nack
It represents that the request can be received, but the receiver's state is not ready to receive now.

data
It represents the data to be transferred.

10.2.1 Single Bus Master  
10.2.2 Multiple Bus Master  
10.2.3 Split Transaction  


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10.2.1 Single Bus Master

An example of single bus master is shown. The packet reference is done in clock_in phase, while the packet sending or bus release is done in clock_out phase.


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10.2.2 Multiple Bus Master

If there are multiple bus masters, one of them must be an owner before transfer. After the transaction, the bus must be released. The exclusive operation of the bus is implemented with port_base class. See section Port Ownership.

The followings are examples of a single read transaction and a single write transaction.


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10.2.3 Split Transaction

When split transaction is executed, releasing the bus during the transaction is added with ownership management. Transaction identifier supported by port, which adds an unique identifier to every transaction is used.

The requester takes the bus ownership, then transfer requesting packet storing its transaction ID. The responder stores the transaction ID and returns grant packet which requests temporal waiting. The requester removes the packet on the bus when grant packet is received, and releases the ownership. The responder returns the ack with the stored transaction ID after requiring interval. The requester receives the ack checking its ID is matched to the previous transaction ID. The succeeding processes are similar to that of multiple-master transaction.

The followings are examples of a single read transaction and a single write transaction.


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This document was generated by Masaki WAKABAYASHI on September, 3 2003 using texi2html