###
### Commands
###
PIPO=			pipo
ICFB=			icfb


###
### Working Directories and Files
###
WORK=			.
LOG_DIR=		log
SCR_DIR=                misc_scripts

###
### Targets
###
TOP_TARGET=		POCOP
TARGETS=		$(TOP_TARGET)
SCR_FILES=		$(TARGETS:%=%_strmin.scr) $(TARGETS:%=%_open.scr)

###
### Main Rules
###
.PHONY: stdcell iocell frame base clean

$(TOP_TARGET): setup
setup:  $(LOG_DIR)
all:    setup $(TARGETS)
###open: $(TOP_TARGET).open

###
### Rules
###
$(LOG_DIR):
	mkdir -p $@

stdcell:
	sed 's|__CELL_NAME__|/home/vdec/lib/fujitsu65/cs202_sc_io_lib/gds/CS202SZ/cs202sz_uc.gds|g' $(SCR_DIR)/streamin.template > $(SCR_DIR)/streamin.scr
	$(PIPO) strmin $(SCR_DIR)/streamin.scr

stdcell_sn:
	sed 's|__CELL_NAME__|/home/vdec/lib/fujitsu65/cs202_sc_io_lib/gds/CS202SN/cs202sn_uc.gds|g' $(SCR_DIR)/streamin.template > $(SCR_DIR)/streamin.scr
	$(PIPO) strmin $(SCR_DIR)/streamin.scr

fmcell:
	sed 's|__CELL_NAME__|/home/vdec/lib/fujitsu65/cs202_sc_io_lib/gds/common/cs202_fm.gds|g' $(SCR_DIR)/streamin.template > $(SCR_DIR)/streamin.scr
	$(PIPO) strmin $(SCR_DIR)/streamin.scr

frame:
	sed 's|__CELL_NAME__|/home/vdec/lib/fujitsu65/frame/frames.str|g' $(SCR_DIR)/streamin.template > $(SCR_DIR)/streamin.scr
	$(PIPO) strmin $(SCR_DIR)/streamin.scr
	sed 's|__CELL_NAME__|/home/vdec/lib/fujitsu65/frame/MB8AW4203_FRAME.gds|g' $(SCR_DIR)/streamin.template > $(SCR_DIR)/streamin.scr
	$(PIPO) strmin $(SCR_DIR)/streamin.scr

iocell:
	sed 's|__CELL_NAME__|/home/vdec/lib/fujitsu65/io/200806RDF_IO/RDF/lib/gds/CS202/common/cs202_io.gds|g' $(SCR_DIR)/streamin.template > $(SCR_DIR)/streamin.scr
	$(PIPO) strmin $(SCR_DIR)/streamin.scr

pocop:
	sed 's|__CELL_NAME__|input/POCOP.gds|g' $(SCR_DIR)/streamin.template > $(SCR_DIR)/streamin.scr
	$(PIPO) strmin $(SCR_DIR)/streamin.scr
	sed 's|__CELL_NAME__|POCOP|g' $(SCR_DIR)/streamout.template > $(SCR_DIR)/streamout.scr
	$(PIPO) strmout $(SCR_DIR)/streamout.scr
	mv POCOP.gds input/
	make POCOP.cdl

#remove:
#	rm -rf ./CS202/WIMCOPYA
#	rm -rf ./CS202/WIMTXTF1
#	cp -R WIMCOPYA ./CS202
#	cp -R WIMTXTF1 ./CS202

#base: setup stdcell fmcell pad frame iocell ramrom replace
base: setup stdcell fmcell iocell frame
units: pe

%.streamin:
#	rm -rf ./CS202/$*_*
	sed 's|__CELL_NAME__|$*.gds|g' $(SCR_DIR)/streamInKeys_setup.il > $(SCR_DIR)/streamin.scr
	$(PIPO) strmin $(SCR_DIR)/streamin.scr

%.streamout:
	export ARTISTLIB='/home/vdec/lib/ux8l/AnalogArtist/UX8'
	sed 's|__CELL_NAME__|$*|g' $(SCR_DIR)/streamOutKeys_setup.il > $(SCR_DIR)/streamout.scr
	$(PIPO) strmout $(SCR_DIR)/streamout.scr

%.addframe: 
	sed 's|__CELL_NAME__|$*|g' $(SCR_DIR)/addframe.template > $(SCR_DIR)/addframe.scr
	sed 's|__CELL_NAME__|$*|g' $(SCR_DIR)/streamout.template > $(SCR_DIR)/streamout.scr
	MGC_CALIBRE_LAYOUT_SERVER=$(shell hostname):9189 $(ICFB) -log $(LOG_DIR)/icfb_$*.log -replay $(SCR_DIR)/addframe.scr &


%.open: 
	sed 's|__CELL_NAME__|$*|g' $(SCR_DIR)/open.template > $(SCR_DIR)/open.scr
	MGC_CALIBRE_LAYOUT_SERVER=$(shell hostname):9189 $(ICFB) -log $(LOG_DIR)/icfb_$*.log -replay $(SCR_DIR)/open.scr &

drc_clean:
	rm -rf ./error* *.asc *.sum *.log  ./rule/* drc_*.gds

%.clean:
	rm -rf ./CS202/$*_*

clean: 
	rm -rf $(LOG_DIR)
	rm -rf ./CS202
	rm -f ./cds.lib
	rm -f ./streamin.scr
	rm -f ./streamout.scr
	rm -f ./addframe.scr
	rm -f ./open.scr


###
### Make CDL file from Verilog file
###

#.cdl:
#	v2lvs -64 -s0 VSS -s1 VDD \
#	-addpin VNW -addpin VPW \
#	-s ./cdl/VPW_VSS.sp \
#	-s ./cdl/CORNER_WIRE.cdl \
#	-s ./cdl/cs202sz_uc.cdl \
#	-s /home/vdec/lib/fujitsu65/cs202_sc_io_lib/cdl/common/cs202_io.cdl \
#	-o ./cdl/$*.cdl \
#	-v ./input/$*_lvs.v

# v2lvs -64 -s0 VSS -s1 VDD \
# 	-s ./ux8l_stdcell.cdl \
# 	-v ./DMEM_ACCESS_CTRL.lvs.v \
# 	-v ./../pr/inst_mem/tmax/WDREG110PAA128W14C1.v \
# 	-o ./DMEM_ACCESS_CTRL.cdl

# v2lvs -64 -s0 VSS -s1 VDD \
# 	-v ./../design/WDREG110PAA128W14C1.v \
# 	-o ./RAM.cdl

%.drc:
	./run_drc_macro.sh $* | tee $*.drc.log
	./../tools/mail.sh "Calibre DRC Macro"

# %.cdl:
# 	v2lvs -64 -s0 VSS -s1 VDD \
# 	-addpin VNW -addpin VPW \
# 	-s ./ux8l_stdcell.cdl \
# 	-o ./$*.cdl \
# 	-v ./$*.lvs.v

%.cdl:
	./make_lvsnet.csh $*

%.lvs:
	rm ./misc_scripts/run_lvs.scr -rf
	touch ./misc_scripts/run_lvs.scr
	sed 's/DESIGN_NAME/$*/g' ./misc_scripts/run_lvs.template > ./misc_scripts/run_lvs.scr
	calibre -lvs -turbo 8 -64 -hier -spice $*_net.gz ./misc_scripts/run_lvs.scr | tee $*.lvs.log
	./../tools/mail.sh "Calibre LVS"

# cube:
# 	sed 's|__CELL_NAME__|cube.gds|g' $(SCR_DIR)/streamin.template > $(SCR_DIR)/streamin.scr
# 	$(PIPO) strmin $(SCR_DIR)/streamin.scr
# ptp:
# 	sed 's|__CELL_NAME__|ptp.gds|g' $(SCR_DIR)/streamin.template > $(SCR_DIR)/streamin.scr
# 	$(PIPO) strmin $(SCR_DIR)/streamin.scr
# sb4:
# 	sed 's|__CELL_NAME__|sb4.gds|g' $(SCR_DIR)/streamin.template > $(SCR_DIR)/streamin.scr
# 	$(PIPO) strmin $(SCR_DIR)/streamin.scr
# CUBE_TOP:
# 	sed 's|__CELL_NAME__|CUBE_TOP.gds|g' $(SCR_DIR)/streamin.template > $(SCR_DIR)/streamin.scr
# 	$(PIPO) strmin $(SCR_DIR)/streamin.scr

# CUBE_TOP2:
# 	sed 's|__CELL_NAME__|CUBE_TOP2.gds|g' $(SCR_DIR)/streamin.template > $(SCR_DIR)/streamin.scr
# 	$(PIPO) strmin $(SCR_DIR)/streamin.scr

# %.cdl:
# 	v2lvs -64 -s0 VSS -s1 VDD \
# 	-addpin VNW -addpin VPW \
# 	-s ./VPW_VSS.cdl \
# 	-s ./CORNER_WIRE.cdl \
# 	-s ./cs202pg_uc_ail.cdl \
# 	-s ./cs202sz_uc.cdl \
# 	-s ./ps_filler.cdl \
# 	-s /home/vdec/lib/fujitsu65/cs202_sc_io_lib/cdl/common/cs202_io.cdl \
# 	-o ./cdl/$*.cdl \
# 	-v ./input/$*_lvs.v

