WASMII Group

• Koichiro Masuyama, Yu Fujita, Hayate Okuhara and Hideharu Amano, “A 297MOPS/0.4mW Ultra Low Power Coarse-grained Reconfigurable Accelerator CMA-SOTB-2″ , Proc. of The 10th International Conference on ReConFigurable Computing and FPGAs, pp.xxx-xxx, 2015.(to appear)

• Yu Fujita, Hayate Okuhara, Koichiro Masuyama, and Hideharu Amano, “Power optimization considering the chip temperature of low power reconfigurable accelerator CMA-SOTB” , Proc. of The Third International Symposium on Computing and Networking (CANDAR), pp.xxx-xxx, 2015.(to appear)

• Akio Nomura,Yu Fujita, Hiroki Matsutani,and Hideharu Amano, “3D Shared Bus Architecture Using Inductive Coupling Interconnect” , Proc. of IEEE 9th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC), pp.xxx-xxx, Sep 2015.

• Hayate Okuhara, Kuniaki Kitamori, Yu Fujita, Kimiyoshi Usami, and Hideharu Amano, "An Optimal Power Supply And Body Bias Voltage for a Ultra Low Power Micro-Controller with Silicon on Thin BOX MOSFET", International Symposium on Low Power Electronics and Design(ISLPED2015),2015.

• Koichiro Masuyama, Yu Fujita, Hayate Okuhara, Hideharu Amano, “Ultra Low Power Reconfigurable Accelerator CMA-SOTB-2″, Proc. of th e 18th IEEE Symposium on Low-Power and High-Speed Chips (COOL Chips XVIII), Poster session, Apr. 2015. (Best poster award)

• Akio Nomura, Yu Fujita, Hiroki Matsutani, Hideharu Amano, “3D Bus Architecture using Inductive Coupling ThruChip-Interface” , Proc. of the 18th IEEE Symposium on Low-Power and High-Speed Chips (COOL Chips XVIII), Poster session, Apr. 2015.

• Hayate Okuhara, Kimiyoshi Usami, Hideharu Amano, “A Leakage Current Monitor Circuit Using Silicon on Thin BOX MOSFET for Dynamic Back Gate Bias Control”, Proc. of the 18th IEEE Symposium on Low-Power and High-Speed Chips (COOL Chips XVIII), Apr. 2015.

• Johannes Maximilian Kuhn, Dustin Peterson, Hideharu Amano, Oliver Bringmann, "Spatial and temporal granularity limits of body biasing in UTBB-FDSOI", Proc. of the Design, Automation & Test in Europe Conference & Exhibition(DATE), Mar. 2015.

• Toru Katagiri, Hideharu Amano, “A high speed design and implementation of dynamically reconfigurable processor using 28nm SOI technology”, Proc. of Field Programable Logic and Applications (FPL), September 2014.

• Yu Fujita, Yusuke Koizumi, Rie Uno, Hideharu Amano, "Voltage control considering the chip temperature in the three-dimensional stacked multi-core processors," Proc. of the COOL Chips XVII (Poster), April 2014.

• Yu Fujita, Kimiyoshi Usami, Hideharu Amano, "A Thermal Management System for Building Block Computing System." Proc. of Enbedded Multicore/Many-core System on Chips, September 2014.

• Honlian Su, Yu Fujita, Hideharu Amano, "Body Bias Control for a Coarse Grained Reconfigurable Accelerator Implemented with Silicon on Thin BOX Technology," Proc. of Field Programable Logic and Applications, September 2014.

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